資源簡介
Verilog寫的浮點(diǎn)運(yùn)算單元。

代碼片段和文件信息
#!/usr/bin/env?python
from?chips.api.api?import?*
import?sys
import?subprocess
from?random?import?randint
from?random?import?seed
def?compile():
????subprocess.call(“iverilog?-o?test_bench_tb?file_reader_a.v?file_reader_b.v?file_writer.v?adder.v?test_bench.v?test_bench_tb.v“?shell=True)
def?run_test(stimulus_a?stimulus_b):
????test?=?subprocess.Popen(“c_test/test“?stdin=subprocess.PIPE?stdout=subprocess.PIPE)
????stim_a?=?open(“stim_a“?‘w‘);
????stim_b?=?open(“stim_b“?‘w‘);
????expected_responses?=?[]
????for?a?b?in?zip(stimulus_a?stimulus_b):
????????test.stdin.write(str(a)+“\n“)
????????test.stdin.write(str(b)+“\n“)
????????stim_a.write(str(a)?+?“\n“)
????????stim_b.write(str(b)?+?“\n“)
????????z?=?int(test.stdout.readline())
????????expected_responses.append(z)
????test.terminate()
????stim_a.close()
????stim_b.close()
????subprocess.call(“./test_bench_tb“?shell=True)
????stim_z?=?open(“resp_z“);
????actual_responses?=?[]
????for?value?in?stim_z:
????????actual_responses.append(int(value))
????if?len(actual_responses)?????????print?“Fail?...?not?enough?results“
????????exit(0)
????for?expected?actual?a?b?in?zip(expected_responses?actual_responses?stimulus_a?stimulus_b):
????????if(expected?!=?actual):
????????????expected_mantissa?=?expected?&?0x7fffff
????????????expected_exponent?=?((expected?&?0x7f800000)?>>?23)?-?127
????????????expected_sign?=?((expected?&?0x80000000)?>>?31)
????????????actual_mantissa?=?actual?&?0x7fffff
????????????actual_exponent?=?((actual?&?0x7f800000)?>>?23)?-?127
????????????actual_sign?=?((actual?&?0x80000000)?>>?31)
????????????if?expected_exponent?==?128?and?expected_mantissa?!=?0:
????????????????if(actual_exponent?==?128):
????????????????????passed?=?True
????????????else:
????????????????passed?=?False
????????else:
?????????????passed?=?True
????????if?not?passed:
????????????print?“Fail?...?expected:“?hex(expected)?“actual:“?hex(actual)
????????????print?hex(a)
????????????print?“a?mantissa:“?a?&?0x7fffff
????????????print?“a?exponent:“?((a?&?0x7f800000)?>>?23)?-?127
????????????print?“a?sign:“?((a?&?0x80000000)?>>?31)
????????????print?hex(b)
????????????print?“b?mantissa:“?b?&?0x7fffff
????????????print?“b?exponent:“?((b?&?0x7f800000)?>>?23)?-?127
????????????print?“b?sign:“?((b?&?0x80000000)?>>?31)
????????????print?hex(expected)
????????????print?“expected?mantissa:“?expected?&?0x7fffff
????????????print?“expected?exponent:“?((expected?&?0x7f800000)?>>?23)?-?127
????????????print?“expected?sign:“?((expected?&?0x80000000)?>>?31)
????????????print?hex(actual)
????????????print?“actual?mantissa:“?actual?&?0x7fffff
????????????print?“actual?exponent:“?((actual?&?0x7f800000)?>>?23)?-?127
????????????print?“actual?sign:“?((actual?&?0x80000000)?>>?31)
????????????sys.exit(0)
compile()
count?=?0
#regression?tests
stimulus_a?=?[0x22cb525a?0x40000000?0x83e73d5c?0xbf9b1e94?0x34082401?0x5e8ef81?0x5c75da81?0x2b017]
stimulus_b?=?[0xadd79
?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----
?????目錄???????????0??2014-06-21?14:21??fpu-master\
?????文件???????????0??2014-06-21?14:21??fpu-master\.gitignore
?????文件????????1061??2014-06-21?14:21??fpu-master\COPYING.txt
?????文件????????1322??2014-06-21?14:21??fpu-master\README.rst
?????目錄???????????0??2014-06-21?14:21??fpu-master\adder\
?????文件??????????35??2014-06-21?14:21??fpu-master\adder\.gitignore
?????文件????????6686??2014-06-21?14:21??fpu-master\adder\adder.v
?????目錄???????????0??2014-06-21?14:21??fpu-master\adder\c_test\
?????文件????????8496??2014-06-21?14:21??fpu-master\adder\c_test\test
?????文件?????????237??2014-06-21?14:21??fpu-master\adder\c_test\test.cpp
?????文件????????7932??2014-06-21?14:21??fpu-master\adder\file_reader_a.v
?????文件????????7932??2014-06-21?14:21??fpu-master\adder\file_reader_b.v
?????文件????????6825??2014-06-21?14:21??fpu-master\adder\file_writer.v
?????文件????????6110??2014-06-21?14:21??fpu-master\adder\run_test.py
?????文件???????????0??2014-06-21?14:21??fpu-master\adder\stim_z
?????文件????????1219??2014-06-21?14:21??fpu-master\adder\test_bench.v
?????文件?????????316??2014-06-21?14:21??fpu-master\adder\test_bench_tb.v
?????目錄???????????0??2014-06-21?14:21??fpu-master\divider\
?????文件??????????35??2014-06-21?14:21??fpu-master\divider\.gitignore
?????目錄???????????0??2014-06-21?14:21??fpu-master\divider\c_test\
?????文件????????9603??2014-06-21?14:21??fpu-master\divider\c_test\test
?????文件?????????237??2014-06-21?14:21??fpu-master\divider\c_test\test.cpp
?????文件????????7466??2014-06-21?14:21??fpu-master\divider\divider.v
?????文件????????7932??2014-06-21?14:21??fpu-master\divider\file_reader_a.v
?????文件????????7932??2014-06-21?14:21??fpu-master\divider\file_reader_b.v
?????文件????????6825??2014-06-21?14:21??fpu-master\divider\file_writer.v
?????文件????????6039??2014-06-21?14:21??fpu-master\divider\run_test.py
?????文件????????1223??2014-06-21?14:21??fpu-master\divider\test_bench.v
?????文件?????????316??2014-06-21?14:21??fpu-master\divider\test_bench_tb.v
?????目錄???????????0??2014-06-21?14:21??fpu-master\double_adder\
?????文件??????????35??2014-06-21?14:21??fpu-master\double_adder\.gitignore
............此處省略121個文件信息
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