資源簡介
學習cadence時自己畫的fpga最小系統板四層板，可以作為學習參考。
代碼片段和文件信息
?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----
?????文件???????1269??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\netlist.log
?????文件??????22531??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\pstchip.dat
?????文件??????22531??2017-06-18?15:59??FPGA_ep4ce6_sys\allegro\pstchip.dat1
?????文件??????22531??2017-06-20?20:54??FPGA_ep4ce6_sys\allegro\pstchip.dat2
?????文件??????22531??2017-06-21?20:06??FPGA_ep4ce6_sys\allegro\pstchip.dat3
?????文件??????61056??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\pstxnet.dat
?????文件??????61159??2017-06-18?15:59??FPGA_ep4ce6_sys\allegro\pstxnet.dat1
?????文件??????61056??2017-06-20?20:54??FPGA_ep4ce6_sys\allegro\pstxnet.dat2
?????文件??????61056??2017-06-21?20:06??FPGA_ep4ce6_sys\allegro\pstxnet.dat3
?????文件??????28297??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\pstxprt.dat
?????文件??????28297??2017-06-18?15:59??FPGA_ep4ce6_sys\allegro\pstxprt.dat1
?????文件??????28297??2017-06-20?20:54??FPGA_ep4ce6_sys\allegro\pstxprt.dat2
?????文件??????28297??2017-06-21?20:06??FPGA_ep4ce6_sys\allegro\pstxprt.dat3
?????文件???????3635??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\pxlBA.txt
?????文件????????616??2018-01-13?12:10??FPGA_ep4ce6_sys\allegro.jrl
?????文件???????4816??2018-01-10?18:27??FPGA_ep4ce6_sys\allegro.jrl1
?????文件??????????0??2017-06-30?21:20??FPGA_ep4ce6_sys\aperture.log
?????文件????????290??2017-06-30?21:22??FPGA_ep4ce6_sys\art_param.txt1
?????文件?????855392??2017-09-13?16:20??FPGA_ep4ce6_sys\autosave.brd
?????文件????????121??2017-11-26?12:17??FPGA_ep4ce6_sys\autosave.brd.lck
?????文件?????871104??2017-06-27?21:28??FPGA_ep4ce6_sys\autosave.SAV
?????文件???????1510??2017-06-30?20:14??FPGA_ep4ce6_sys\autosilk.log
?????文件???????1510??2017-06-18?14:19??FPGA_ep4ce6_sys\autosilk.log1
?????文件???????1386??2017-06-27?21:30??FPGA_ep4ce6_sys\batch_drc.log
?????文件???????1468??2017-06-19?10:23??FPGA_ep4ce6_sys\batch_drc.log1
?????文件???????1388??2017-06-19?20:15??FPGA_ep4ce6_sys\batch_drc.log2
?????文件???????1388??2017-06-19?20:16??FPGA_ep4ce6_sys\batch_drc.log3
?????文件??????27297??2017-06-30?21:20??FPGA_ep4ce6_sys\BOTTOM.art1
?????文件????????661??2017-06-19?10:24??FPGA_ep4ce6_sys\cmpshape.log
?????文件????????661??2017-06-19?10:01??FPGA_ep4ce6_sys\cmpshape.log1
............此處省略99個文件信息
-----------?---------??----------?-----??----
?????文件???????1269??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\netlist.log
?????文件??????22531??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\pstchip.dat
?????文件??????22531??2017-06-18?15:59??FPGA_ep4ce6_sys\allegro\pstchip.dat1
?????文件??????22531??2017-06-20?20:54??FPGA_ep4ce6_sys\allegro\pstchip.dat2
?????文件??????22531??2017-06-21?20:06??FPGA_ep4ce6_sys\allegro\pstchip.dat3
?????文件??????61056??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\pstxnet.dat
?????文件??????61159??2017-06-18?15:59??FPGA_ep4ce6_sys\allegro\pstxnet.dat1
?????文件??????61056??2017-06-20?20:54??FPGA_ep4ce6_sys\allegro\pstxnet.dat2
?????文件??????61056??2017-06-21?20:06??FPGA_ep4ce6_sys\allegro\pstxnet.dat3
?????文件??????28297??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\pstxprt.dat
?????文件??????28297??2017-06-18?15:59??FPGA_ep4ce6_sys\allegro\pstxprt.dat1
?????文件??????28297??2017-06-20?20:54??FPGA_ep4ce6_sys\allegro\pstxprt.dat2
?????文件??????28297??2017-06-21?20:06??FPGA_ep4ce6_sys\allegro\pstxprt.dat3
?????文件???????3635??2017-10-18?15:48??FPGA_ep4ce6_sys\allegro\pxlBA.txt
?????文件????????616??2018-01-13?12:10??FPGA_ep4ce6_sys\allegro.jrl
?????文件???????4816??2018-01-10?18:27??FPGA_ep4ce6_sys\allegro.jrl1
?????文件??????????0??2017-06-30?21:20??FPGA_ep4ce6_sys\aperture.log
?????文件????????290??2017-06-30?21:22??FPGA_ep4ce6_sys\art_param.txt1
?????文件?????855392??2017-09-13?16:20??FPGA_ep4ce6_sys\autosave.brd
?????文件????????121??2017-11-26?12:17??FPGA_ep4ce6_sys\autosave.brd.lck
?????文件?????871104??2017-06-27?21:28??FPGA_ep4ce6_sys\autosave.SAV
?????文件???????1510??2017-06-30?20:14??FPGA_ep4ce6_sys\autosilk.log
?????文件???????1510??2017-06-18?14:19??FPGA_ep4ce6_sys\autosilk.log1
?????文件???????1386??2017-06-27?21:30??FPGA_ep4ce6_sys\batch_drc.log
?????文件???????1468??2017-06-19?10:23??FPGA_ep4ce6_sys\batch_drc.log1
?????文件???????1388??2017-06-19?20:15??FPGA_ep4ce6_sys\batch_drc.log2
?????文件???????1388??2017-06-19?20:16??FPGA_ep4ce6_sys\batch_drc.log3
?????文件??????27297??2017-06-30?21:20??FPGA_ep4ce6_sys\BOTTOM.art1
?????文件????????661??2017-06-19?10:24??FPGA_ep4ce6_sys\cmpshape.log
?????文件????????661??2017-06-19?10:01??FPGA_ep4ce6_sys\cmpshape.log1
............此處省略99個文件信息
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