-
大小: 324KB文件類型: .rar金幣: 1下載: 0 次發(fā)布日期: 2021-01-04
- 語言: 其他
- 標(biāo)簽: mac實現(xiàn)??
資源簡介
以太網(wǎng)控制器源代碼,包括發(fā)送和接收部分,可用于FPGA實現(xiàn)
代碼片段和文件信息
?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\bench\CVS\Entries
?????文件?????????15??2001-12-27?05:13??ethernet__verilog\bench\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\bench\CVS\Root
?????文件?????????47??2001-12-27?05:13??ethernet__verilog\bench\verilog\CVS\Entries
?????文件?????????23??2001-12-27?05:13??ethernet__verilog\bench\verilog\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\bench\verilog\CVS\Root
?????文件??????17759??2001-12-08?20:36??ethernet__verilog\bench\verilog\tb_eth_top.v
?????文件?????????42??2001-12-27?05:13??ethernet__verilog\CVS\Entries
?????文件??????????9??2001-12-27?05:13??ethernet__verilog\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\CVS\Root
?????文件????????129??2001-12-27?05:13??ethernet__verilog\doc\CVS\Entries
?????文件?????????13??2001-12-27?05:13??ethernet__verilog\doc\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\doc\CVS\Root
?????文件??????19801??2001-11-11?06:53??ethernet__verilog\doc\ethernet_product_brief_OC_head.pdf
?????文件?????155915??2001-12-05?23:11??ethernet__verilog\doc\eth_speci.pdf
?????文件????????113??2001-12-27?05:13??ethernet__verilog\doc\src\CVS\Entries
?????文件?????????17??2001-12-27?05:13??ethernet__verilog\doc\src\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\doc\src\CVS\Root
?????文件?????451072??2001-11-11?06:51??ethernet__verilog\doc\src\ethernet_product_brief.doc
?????文件?????373248??2001-12-05?23:09??ethernet__verilog\doc\src\eth_speci.doc
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\rtl\CVS\Entries
?????文件?????????13??2001-12-27?05:13??ethernet__verilog\rtl\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\rtl\CVS\Root
?????文件???????1098??2001-12-27?05:13??ethernet__verilog\rtl\verilog\CVS\Entries
?????文件?????????21??2001-12-27?05:13??ethernet__verilog\rtl\verilog\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\rtl\verilog\CVS\Root
?????文件???????5305??2001-10-19?16:43??ethernet__verilog\rtl\verilog\eth_clockgen.v
?????文件???????7110??2001-10-19?16:43??ethernet__verilog\rtl\verilog\eth_crc.v
?????文件???????6301??2001-12-05?23:00??ethernet__verilog\rtl\verilog\eth_defines.v
?????文件??????10670??2001-10-19?16:43??ethernet__verilog\rtl\verilog\eth_maccontrol.v
............此處省略63個文件信息
-----------?---------??----------?-----??----
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\bench\CVS\Entries
?????文件?????????15??2001-12-27?05:13??ethernet__verilog\bench\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\bench\CVS\Root
?????文件?????????47??2001-12-27?05:13??ethernet__verilog\bench\verilog\CVS\Entries
?????文件?????????23??2001-12-27?05:13??ethernet__verilog\bench\verilog\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\bench\verilog\CVS\Root
?????文件??????17759??2001-12-08?20:36??ethernet__verilog\bench\verilog\tb_eth_top.v
?????文件?????????42??2001-12-27?05:13??ethernet__verilog\CVS\Entries
?????文件??????????9??2001-12-27?05:13??ethernet__verilog\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\CVS\Root
?????文件????????129??2001-12-27?05:13??ethernet__verilog\doc\CVS\Entries
?????文件?????????13??2001-12-27?05:13??ethernet__verilog\doc\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\doc\CVS\Root
?????文件??????19801??2001-11-11?06:53??ethernet__verilog\doc\ethernet_product_brief_OC_head.pdf
?????文件?????155915??2001-12-05?23:11??ethernet__verilog\doc\eth_speci.pdf
?????文件????????113??2001-12-27?05:13??ethernet__verilog\doc\src\CVS\Entries
?????文件?????????17??2001-12-27?05:13??ethernet__verilog\doc\src\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\doc\src\CVS\Root
?????文件?????451072??2001-11-11?06:51??ethernet__verilog\doc\src\ethernet_product_brief.doc
?????文件?????373248??2001-12-05?23:09??ethernet__verilog\doc\src\eth_speci.doc
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\rtl\CVS\Entries
?????文件?????????13??2001-12-27?05:13??ethernet__verilog\rtl\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\rtl\CVS\Root
?????文件???????1098??2001-12-27?05:13??ethernet__verilog\rtl\verilog\CVS\Entries
?????文件?????????21??2001-12-27?05:13??ethernet__verilog\rtl\verilog\CVS\Repository
?????文件?????????14??2001-12-27?05:13??ethernet__verilog\rtl\verilog\CVS\Root
?????文件???????5305??2001-10-19?16:43??ethernet__verilog\rtl\verilog\eth_clockgen.v
?????文件???????7110??2001-10-19?16:43??ethernet__verilog\rtl\verilog\eth_crc.v
?????文件???????6301??2001-12-05?23:00??ethernet__verilog\rtl\verilog\eth_defines.v
?????文件??????10670??2001-10-19?16:43??ethernet__verilog\rtl\verilog\eth_maccontrol.v
............此處省略63個文件信息
- 上一篇：QtCharts圖形移動和縮放
- 下一篇：用于SoC設(shè)計的DFT和BIST
評論
共有 條評論