?屬性????????????大小?????日期????時(shí)間???名稱
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?????文件???21035925??2017-02-14?15:09??03_學(xué)習(xí)教程\ALINX黑金Zynq7000開(kāi)發(fā)平臺(tái)配套教程V1.03.pdf

?????文件????2729851??2015-10-09?11:11??03_學(xué)習(xí)教程\xilinx原語(yǔ)的使用方法.pdf

?????文件?????215741??2016-12-12?12:43??03_學(xué)習(xí)教程\非常重要——SDK調(diào)試技巧.pdf

?????文件?????415710??2017-03-22?17:41??03_學(xué)習(xí)教程\非常重要——SDK調(diào)試技巧2.pdf

?????文件?????521728??2017-01-14?22:26??01_硬件設(shè)計(jì)資料\PCB\AC7010_AC7020.PcbLib

?????文件?????730372??2017-01-14?22:26??01_硬件設(shè)計(jì)資料\PCB\AC7010_AC7020_Allegro_lib.zip

?????文件?????759012??2017-05-18?10:29??01_硬件設(shè)計(jì)資料\PCB\AC7010_AC7020核心板PCB設(shè)計(jì)圖.pdf

?????文件?????121344??2017-01-14?22:26??01_硬件設(shè)計(jì)資料\原理圖\AC7010_AC7020_sch_lib_orcad_16_5.OLB

?????文件????????682??2017-04-06?16:28??01_硬件設(shè)計(jì)資料\原理圖\AC7010_AC7020_sch_lib_orcad_16_5.opj

?????文件?????278527??2017-05-18?18:36??01_硬件設(shè)計(jì)資料\原理圖\AC7010_AC7020核心板原理圖.pdf

?????文件?????379904??2017-05-19?11:43??01_硬件設(shè)計(jì)資料\結(jié)構(gòu)\AC7010-2017-03-29.PcbDoc

?????文件????8356233??2017-05-15?16:54??01_硬件設(shè)計(jì)資料\結(jié)構(gòu)\AC7010_AC7020尺寸結(jié)構(gòu).dxf

?????文件??????42206??2017-05-15?16:45??01_硬件設(shè)計(jì)資料\結(jié)構(gòu)\AC7010_AC7020尺寸結(jié)構(gòu).pdf

?????文件???????1178??2017-05-19?14:29??01_硬件設(shè)計(jì)資料\結(jié)構(gòu)\allegro.jrl

?????文件?????????30??2017-05-19?12:48??01_硬件設(shè)計(jì)資料\結(jié)構(gòu)\master.tag

?????目錄??????????0??2017-05-19?19:50??01_硬件設(shè)計(jì)資料\PCB

?????目錄??????????0??2017-05-19?19:50??01_硬件設(shè)計(jì)資料\原理圖

?????目錄??????????0??2017-05-19?19:50??01_硬件設(shè)計(jì)資料\結(jié)構(gòu)

?????目錄??????????0??2017-05-19?19:50??03_學(xué)習(xí)教程

?????目錄??????????0??2017-05-19?19:50??01_硬件設(shè)計(jì)資料

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