Signal Integrity is no longer an issue for microprocessor and radio frequency designers who designed high-end custom IC designs. As technology scales, clock frequencies rise, and the need for higher integration of analog and digital IP blocks increases, unwanted parasitic effects become more and more a gating factor to IC design project success. Many of these effects can be prevented or analyzed and fixed in isolation, but increasingly they are becoming highly dependent on each other. This all creates a lot of confusion and subjective opinion in the IC design world about how to deal with these new problems. The purpose of this book is to help clear these confusions, and offer a number of methods for IC designers and CAD engineers to model, and then solve, these problems.