?屬性????????????大小?????日期????時(shí)間???名稱
-----------?---------??----------?-----??----
?????文件????????3041??2018-12-14?12:18??ADDSUB_32.v
?????文件?????????994??2018-12-14?12:18??ALU.v
?????文件?????????736??2018-12-14?12:18??DATAMEM.v
?????文件?????????693??2018-12-11?18:52??EXT16T32.v
?????文件????????1907??2018-12-17?00:10??INSTMEM.v
?????文件????????3095??2018-12-20?21:39??MAIN.v
?????文件?????????681??2018-12-14?12:18??MUX2X5.v
?????文件?????????794??2018-12-14?12:18??MUX4X32.v
?????文件????????1093??2018-12-14?12:18??PC.v
?????文件????????8646??2018-12-11?18:52??REGFILE.v
?????文件?????????750??2018-12-11?18:52??SHIFTER32_L2.v
?????文件????????4980??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xelab.pb
?????文件????????9515??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.xpr
?????文件???????17864??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xvlog.pb
?????文件???????10174??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xvlog.log
?????文件??????????40??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xsim.ini
?????文件???????????8??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xsim.dir\xsim.svtype
?????文件????????1561??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xsim.dir\xil_defaultlib\xil_defaultlib.rlx
?????文件????????3885??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xsim.dir\xil_defaultlib\glbl.sdb
?????文件????????1728??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xsim.dir\xil_defaultlib\@t@e@s@t.sdb
?????文件????????1114??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xsim.dir\xil_defaultlib\@s@h@i@f@t@e@r_@c@o@m@b@i@n@a@t@i@o@n.sdb
?????文件?????????929??2018-12-17?00:33??project_SigleCycleCPU\project_SigleCycleCPU.sim\sim_1\behav\xsim.dir\xil_defaultlib\@s@h@i@f@t@e@r32_@l2.sdb
?????目錄???????????0??2019-03-22?12:46??project_SigleCycleCPU\
?????文件???????19857??2018-12-17?00:55??project_SigleCycleCPU\TEST_behav.wcfg
?????目錄???????????0??2019-03-22?12:46??project_SigleCycleCPU\project_SigleCycleCPU.cache\
?????目錄???????????0??2019-03-22?12:46??project_SigleCycleCPU\project_SigleCycleCPU.cache\compile_simlib\
?????目錄???????????0??2019-03-22?12:47??project_SigleCycleCPU\project_SigleCycleCPU.cache\compile_simlib\activehdl\
?????目錄???????????0??2019-03-22?12:47??project_SigleCycleCPU\project_SigleCycleCPU.cache\compile_simlib\ies\
?????目錄???????????0??2019-03-22?12:47??project_SigleCycleCPU\project_SigleCycleCPU.cache\compile_simlib\modelsim\
?????目錄???????????0??2019-03-22?12:47??project_SigleCycleCPU\project_SigleCycleCPU.cache\compile_simlib\questa\
?????目錄???????????0??2019-03-22?12:47??project_SigleCycleCPU\project_SigleCycleCPU.cache\compile_simlib\riviera\
............此處省略78個(gè)文件信息