/**********************************************************************/
/*???____??____???????????????????????????????????????????????????????*/
/*??/???/\/???/???????????????????????????????????????????????????????*/
/*?/___/??\??/????????????????????????????????????????????????????????*/
/*?\???\???\/???????????????????????????????????????????????????????*/
/*??\???\????????Copyright?（c）?2003-2009?Xilinx?Inc.????????????????*/
/*??/???/??????????All?Right?Reserved.?????????????????????????????????*/
/*?/---/???/\?????????????????????????????????????????????????????????*/
/*?\???\??/??\??????????????????????????????????????????????????????*/
/*??\___\/\___\????????????????????????????????????????????????????*/
/***********************************************************************/

/*?This?file?is?designed?for?use?with?ISim?build?0x7708f090?*/

#define?XSI_HIDE_SYMBOL_SPEC?true
#include?“xsi.h“
#include?
#ifdef?__GNUC__
#include?
#else
#include?
#define?alloca?_alloca
#endif
static?const?char?*ng0?=?“E:/Multiple_Clock/pc.v“;
static?unsigned?int?ng1[]?=?{0U?0U};
static?int?ng2[]?=?{1?0};
static?unsigned?int?ng3[]?=?{1U?0U};



static?void?Initial_29_0（char?*t0）
{
????char?*t1;
????char?*t2;

LAB0:????xsi_set_current_line（29?ng0）;

LAB2:????xsi_set_current_line（29?ng0）;
????t1?=?（（char*）（（ng1）））;
????t2?=?（t0?+?1928）;
????xsi_vlogvar_assign_value（t2?t1?0?0?11）;

LAB1:????return;
}

static?void?Always_30_1（char?*t0）
{
????char?t6[8];
????char?*t1;
????char?*t2;
????char?*t3;
????char?*t4;
????char?*t5;
????char?*t7;
????char?*t8;
????unsigned?int?t9;
????unsigned?int?t10;
????unsigned?int?t11;
????unsigned?int?t12;
????unsigned?int?t13;
????unsigned?int?t14;
????unsigned?int?t15;
????unsigned?int?t16;
????unsigned?int?t17;
????unsigned?int?t18;
????unsigned?int?t19;
????unsigned?int?t20;
????char?*t21;
????char?*t22;
????unsigned?int?t23;
????unsigned?int?t24;
????unsigned?int?t25;
????unsigned?int?t26;
????unsigned?int?t27;
????char?*t28;
????char?*t29;

LAB0:????t1?=?（t0?+?3096U）;
????t2?=?*（（char?**）t1）;
????if?（t2?==?0）
????????goto?LAB2;

LAB3:????goto?*t2;

LAB2:????xsi_set_current_line（30?ng0）;
????t2?=?（t0?+?3416）;
????*（（int?*）t2）?=?1;
????t3?=?（t0?+?3128）;
????*（（char?**）t3）?=?t2;
????*（（char?**）t1）?=?&&LAB4;

LAB1:????return;
LAB4:????xsi_set_current_line（30?ng0）;

LAB5:????xsi_set_current_line（31?ng0）;
????t4?=?（t0?+?1208U）;
????t5?=?*（（char?**）t4）;
????t4?=?（（char*）（（ng2）））;
????memset（t6?0?8）;
????t7?=?（t5?+?4）;
????t8?=?（t4?+?4）;
????t9?=?*（（unsigned?int?*）t5）;
????t10?=?*（（unsigned?int?*）t4）;
????t11?=?（t9?^?t10）;
????t12?=?*（（unsigned?int?*）t7）;
????t13?=?*（（unsigned?int?*）t8）;
????t14?=?（t12?^?t13）;
????t15?=?（t11?|?t14）;
????t16?=?*（（unsigned?int?*）t7）;
????t17?=?*（（unsigned?int?*）t8）;
????t18?=?（t16?|?t17）;
????t19?=?（~（t18））;
????t20?=?（t15?&?t19）;
????if?（t20?!=?0）
??

?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----

?????文件???????1125??2014-05-29?15:04??Multiple_Clock\alu.v

?????文件???????1111??2014-05-27?11:38??Multiple_Clock\alu_ctr.v

?????文件???????1954??2014-05-27?10:15??Multiple_Clock\display.v

?????文件???????3277??2014-09-17?21:29??Multiple_Clock\fuse.log

?????文件???????1301??2014-09-17?21:29??Multiple_Clock\fuse.xmsgs

?????文件????????214??2014-09-17?21:29??Multiple_Clock\fuseRelaunch.cmd

?????文件????????236??2014-09-17?19:32??Multiple_Clock\ipcore_dir\coregen.cgp

?????文件????????183??2014-09-17?21:10??Multiple_Clock\ipcore_dir\coregen.log

?????文件???????1277??2014-09-17?19:23??Multiple_Clock\ipcore_dir\create_memory.tcl

?????文件???????1122??2014-09-17?21:09??Multiple_Clock\ipcore_dir\edit_memory.tcl

?????文件???????7721??2012-12-18?12:57??Multiple_Clock\ipcore_dir\memory\blk_mem_gen_v7_3_readme.txt

?????文件???????8311??2014-09-17?19:31??Multiple_Clock\ipcore_dir\memory\doc\blk_mem_gen_v7_3_vinfo.html

?????文件??????75791??2012-12-18?12:57??Multiple_Clock\ipcore_dir\memory\doc\pg058-blk-mem-gen.pdf

?????文件???????2777??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\example_design\memory_exdes.ucf

?????文件???????5142??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\example_design\memory_exdes.vhd

?????文件???????2720??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\example_design\memory_exdes.xdc

?????文件??????10513??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\example_design\memory_prod.vhd

?????文件???????1074??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\implement\implement.bat

?????文件???????1057??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\implement\implement.sh

?????文件???????2683??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\implement\planAhead_ise.bat

?????文件???????2578??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\implement\planAhead_ise.sh

?????文件???????3125??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\implement\planAhead_ise.tcl

?????文件?????????41??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\implement\xst.prj

?????文件????????221??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\implement\xst.scr

?????文件???????4526??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\simulation\addr_gen.vhd

?????文件??????12714??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\simulation\bmg_stim_gen.vhd

?????文件???????6206??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\simulation\bmg_tb_pkg.vhd

?????文件???????5768??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\simulation\checker.vhd

?????文件???????5164??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\simulation\data_gen.vhd

?????文件???????2733??2014-09-17?19:30??Multiple_Clock\ipcore_dir\memory\simulation\functional\simcmds.tcl

............此處省略251個文件信息