/**************************************************************************//**
?*?@file????library/Device/Holtek/HT32F5xxxx/Source/system_ht32f5826.c
?*?@brief???CMSIS?Cortex-M0+?Device?Peripheral?Access?layer?Source?File
?*??????????for?the?Holtek?HT32F5xxxx?Device?Series
?*?@version?$Rev::?2451?????????$
?*?@date????$Date::?2017-12-26?#$
?*
?*?@note
?*?Copyright?（C）?Holtek?Semiconductor?Inc.?All?rights?reserved.
?*
?*?@par
?*?ARM?Limited?（ARM）?supplies?this?software?for?Cortex-M?processor-based
?*?microcontrollers.?This?file?can?be?freely?distributed?within?development
?*?tools?that?are?supporting?such?ARM?based?processors.
?*
?*?@par
?*?THIS?SOFTWARE?IS?PROVIDED?“AS?IS“.??NO?WARRANTIES?WHETHER?EXPRESS?IMPLIED
?*?OR?STATUTORY?INCLUDING?BUT?NOT?LIMITED?TO?IMPLIED?WARRANTIES?OF
?*?MERCHANTABILITY?AND?FITNESS?FOR?A?PARTICULAR?PURPOSE?APPLY?TO?THIS?SOFTWARE.
?*?ARM?SHALL?NOT?IN?ANY?CIRCUMSTANCES?BE?LIABLE?FOR?SPECIAL?INCIDENTAL?OR
?*?CONSEQUENTIAL?DAMAGES?FOR?ANY?REASON?WHATSOEVER.
?*
?******************************************************************************/

//?Supported?Device
//?========================================
//???HT32F5826

//#define?USE_HT32F5826

/**?@addtogroup?CMSIS
??*?@{
??*/

/**?@addtogroup?HT32F5xxxx_system?HT32F5xxxx?System
??*?@{
??*/


#include?“ht32f5xxxx_01.h“

/**?@addtogroup?HT32F5xxxx_System_Private_Defines
??*?@{
??*/
/*
//--------?<<>>?------------------
*/

/*---------------------?Clock?Configuration?----------------------------------
//
//?????Enable?High?Speed?Internal?RC?Oscillator?（HSI）
//???????????Default?HSI?=?ENABLE
//
//?????Enable?High?Speed?External?Crystal?Oscillator?（HSE）
//???????????Default?HSE?=?DISABLE
//
//?????Enable?Low?Speed?External?Crystal?Oscillator?（LSE）
//???????????Default?LSE?=?DISABLE
//???????????Not?apply?to?HT32F52220/30
//
//?????Enable?PLL
//?????????????????Default?PLL?=?DISABLE
//??????????PLL?Clock?Source
//????????????????<0=>?CK_HSE
//????????????????<1=>?CK_HSI
//?????????????????Default?PLL?clock?source?=?CK_HSI
//?????????????????PLL?source?clock?must?be?in?the?range?of?4?MHz?to?16?MHz
//??????????PLL?Feedback?Clock?Divider?（NF2）:?1?~?16
//????????????????<1-16:1>
//?????????????????PLL?feedback?clock?=?PLL?clock?source?x?NF2
//?????????????????PLL?feedback?clock?must?be?in?the?range?of?16?MHz?to?48?MHz
//??????????PLL?Output?Clock?Divider?（NO2）
//????????????????<0=>?1
//????????????????<1=>?2
//????????????????<2=>?4
//????????????????<3=>?8
//?????????????????PLL?output?clock?=?PLL?feedback?clock?/?NO2
//?????????????????PLL?output?clock?must?be?in?the?range?of?2?MHz?to?48?MHz
//??????
//
//?????SystemCoreClock?Configuration?（CK_AHB）
//??????????SystemCoreClock?Source
//????????????????<1=>?CK_PLL
//????????????????<2=>?CK_HSE
//????????????????<3=>?CK_HSI