/**********************************************************************/
/*???____??____???????????????????????????????????????????????????????*/
/*??/???/\/???/???????????????????????????????????????????????????????*/
/*?/___/??\??/????????????????????????????????????????????????????????*/
/*?\???\???\/???????????????????????????????????????????????????????*/
/*??\???\????????Copyright?（c）?2003-2009?Xilinx?Inc.????????????????*/
/*??/???/??????????All?Right?Reserved.?????????????????????????????????*/
/*?/---/???/\?????????????????????????????????????????????????????????*/
/*?\???\??/??\??????????????????????????????????????????????????????*/
/*??\___\/\___\????????????????????????????????????????????????????*/
/***********************************************************************/

/*?This?file?is?designed?for?use?with?ISim?build?0x7708f090?*/

#define?XSI_HIDE_SYMBOL_SPEC?true
#include?“xsi.h“
#include?
#ifdef?__GNUC__
#include?
#else
#include?
#define?alloca?_alloca
#endif
static?const?char?*ng0?=?“F:/FPGA?ise/project/clk?project/keydebounce/debounce.v“;
static?unsigned?int?ng1[]?=?{0U?0U};



static?void?Always_31_0（char?*t0）
{
????char?t4[8];
????char?*t1;
????char?*t2;
????char?*t3;
????char?*t5;
????char?*t6;
????unsigned?int?t7;
????unsigned?int?t8;
????unsigned?int?t9;
????unsigned?int?t10;
????unsigned?int?t11;
????char?*t12;
????char?*t13;
????unsigned?int?t14;
????unsigned?int?t15;
????unsigned?int?t16;
????unsigned?int?t17;
????unsigned?int?t18;
????char?*t19;
????char?*t20;

LAB0:????t1?=?（t0?+?3168U）;
????t2?=?*（（char?**）t1）;
????if?（t2?==?0）
????????goto?LAB2;

LAB3:????goto?*t2;

LAB2:????xsi_set_current_line（31?ng0）;
????t2?=?（t0?+?3736）;
????*（（int?*）t2）?=?1;
????t3?=?（t0?+?3200）;
????*（（char?**）t3）?=?t2;
????*（（char?**）t1）?=?&&LAB4;

LAB1:????return;
LAB4:????xsi_set_current_line（32?ng0）;

LAB5:????xsi_set_current_line（33?ng0）;
????t5?=?（t0?+?1368U）;
????t6?=?*（（char?**）t5）;
????memset（t4?0?8）;
????t5?=?（t6?+?4）;
????t7?=?*（（unsigned?int?*）t5）;
????t8?=?（~（t7））;
????t9?=?*（（unsigned?int?*）t6）;
????t10?=?（t9?&?t8）;
????t11?=?（t10?&?1U）;
????if?（t11?!=?0）
????????goto?LAB9;

LAB7:????if?（*（（unsigned?int?*）t5）?==?0）
????????goto?LAB6;

LAB8:????t12?=?（t4?+?4）;
????*（（unsigned?int?*）t4）?=?1;
????*（（unsigned?int?*）t12）?=?1;

LAB9:????t13?=?（t4?+?4）;
????t14?=?*（（unsigned?int?*）t13）;
????t15?=?（~（t14））;
????t16?=?*（（unsigned?int?*）t4）;
????t17?=?（t16?&?t15）;
????t18?=?（t17?!=?0）;
????if?（t18?>?0）
????????goto?LAB10;

LAB11:????xsi_set_current_line（40?ng0）;

LAB14:????xsi_set_current_line（41?ng0）;
????t2?=?（t0?+?1048U）;
????t3?=?*（（char?**）t2）;
????t2?=?（t0?+?1928）;
????xsi_vlogvar_wait_assign_value（t2?t3?0?0?4?0LL）;
????xsi_set_current_line（42?ng0）;
????t2?=?（t0?+?1928）;
????t3?=?（t2?+?56U）;
????t5?=?*（（char?**）t3）;
????t6?=?（t0?+?2088）;
????xsi_vlogvar_wait_assign_value（t6?t5

?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----
?????目錄???????????0??2017-02-11?13:29??clk?project\
?????目錄???????????0??2016-11-15?18:25??clk?project\acclk\
?????文件???????????6??2016-11-15?16:13??clk?project\acclk\.lso
?????文件????????6482??2016-11-15?18:25??clk?project\acclk\acclk.gise
?????文件???????35371??2016-11-15?16:36??clk?project\acclk\acclk.xise
?????文件?????????148??2016-11-15?16:30??clk?project\acclk\clock_led_stx_beh.prj
?????文件????????3524??2016-11-15?16:14??clk?project\acclk\clock_led_summary.html
?????文件?????????145??2016-11-15?16:30??clk?project\acclk\fasheng_stx_beh.prj
?????文件????????3522??2016-11-15?16:14??clk?project\acclk\fasheng_summary.html
?????文件??????????56??2016-11-15?16:13??clk?project\acclk\fenpin.prj
?????文件????????1313??2016-11-15?16:13??clk?project\acclk\fenpin.stx
?????文件?????????170??2016-11-15?16:13??clk?project\acclk\fenpin.xst
?????文件????????7964??2016-11-15?18:25??clk?project\acclk\fenpin_envsettings.html
?????文件????????3615??2016-11-15?18:25??clk?project\acclk\fenpin_summary.html
?????文件?????????367??2016-11-15?16:35??clk?project\acclk\fuse.xmsgs
?????目錄???????????0??2016-11-15?16:13??clk?project\acclk\iseconfig\
?????文件????????8797??2016-11-15?18:25??clk?project\acclk\iseconfig\acclk.projectmgr
?????文件???????20482??2016-11-15?18:25??clk?project\acclk\iseconfig\top.xreport
?????目錄???????????0??2016-11-15?16:29??clk?project\acclk\isim\
?????目錄???????????0??2016-11-15?16:29??clk?project\acclk\isim\temp\
?????文件????????2637??2016-11-15?16:35??clk?project\acclk\isim\temp\clock_led.sdb
?????文件????????3495??2016-11-15?16:35??clk?project\acclk\isim\temp\fasheng.sdb
?????文件????????1841??2016-11-15?16:35??clk?project\acclk\isim\temp\fenpin.sdb
?????文件????????4644??2016-11-15?16:35??clk?project\acclk\isim\temp\glbl.sdb
?????文件????????2413??2016-11-15?16:35??clk?project\acclk\isim\temp\top.sdb
?????文件?????????504??2016-11-15?16:31??clk?project\acclk\top.cmd_log
?????文件???????????6??2016-11-15?16:31??clk?project\acclk\top.lso
?????文件?????????324??2016-11-15?16:31??clk?project\acclk\top.prj
?????文件????????4908??2016-11-15?16:31??clk?project\acclk\top.syr
?????文件????????1131??2016-11-15?16:31??clk?project\acclk\top.xst
?????文件?????????404??2016-11-15?16:35??clk?project\acclk\top_stx_beh.prj
............此處省略1441個文件信息