function?doFFTplot（fssignalssignalLabelsdecFactorfigNumw_type）
%??Plot?a?scaled?fft
%??‘fs‘?is?the?sampling?frequency?in?Hertz
%??‘signals‘?is?a?matrix?comprising?all?the?signal?vectors?whose?FFTs?are?to?be
%??calculated?and?plotted.??
%??‘signalLabels‘?contains?strings?that?correspond?to?each?signal?vector?in?the
%??‘signals‘?matrix.??Each?string?must?be?the?same?length?so?padding?with
%??spaces?may?be?necessary?before?calling?the?function.
%??‘decFactor‘?is?the?decimation?factor?and?is?an?OPTIONAL?ARGUMENT
%??‘figNum‘?is?the?number?you?want?to?attach?to?the?figure?and?is?an?OPTIONAL?ARGUMENT
%??Do?not?pass?in?a?value?for?figNum?if?you?want?to?overlay?plots
%??Example:?If?3?signals?x;?y?and?z?are?to?be
%??plotted?and?the?sampling?frequency?is?100MHz?then?this?function?will?be
%??called?as?follows:
%??doFFTplot（100e6[xyz][‘labelX‘;‘labelY‘;labelZ‘]）
%??The?components?that?make?up?‘signals‘?must?be?vectors
%??Author:?G.Stephen
%??Date:30/03/2006
%??FFT?plotting?code?adapted?from:
%??http://www.mathworks.com/support/tech-notes/1700/1702.html
%-------------------------------------------------------------
%?Modification?to?incorporate?window?selection.
%?Author:?L.?Crockett
%?Date:???20/07/2007
%?A?further?parameter?is?added?to?the?function?to?allow?the?user
%?to?specify?a?windowing?function?for?FFT?plotting.?Choices?are:
%?HANN
%?HAMMING
%?BLACKMAN
%?and?the?default?is?RECTANGULAR?（i.e.?no?explicit?window）.
%?‘w_type‘?is?the?window?type?and?is?an?OPTIONAL?ARGUMENT.
%-------------------------------------------------------------
%?Modification?to?20*log10（abs（fft（x）））
%?Author:?L.?Crockett
%?Date:???7/7/08
%-------------------------------------------------------------

%?check?if?a?decimation?factor?has?been?supplied
if?nargin????decFactor?=?1;?
end?

%?check?if?a?figure?number?has?been?supplied
if?nargin?>?4?
???figure（figNum）;?
end?

%?assign?default?window?if?none?supplied
if?nargin?????w_type?=?‘rect‘;
end????
????

numSamples?=?length（signals（:1））;

%the?number?of?FFTs?to?be?plotted
numVectors?=?length（signals（1:））;

%?Use?next?highest?power?of?2?greater?than?or?equal?to?
%?length?of?signal?to?calculate?FFT.?
N?=?2^（nextpow2（length（signals（:1））））;

if?strncmpi（w_type‘hann‘4）
????w?=?hann（N）‘;
elseif?strncmpi（w_type‘hamming‘4）
????w?=?hamming（N）‘;
elseif?strncmpi（w_type‘blackman‘4）
????w?=?blackman（N）‘;
elseif?strncmpi（w_type‘rect‘4）
????w?=?ones（1N）;
else
????w?=?ones（1N）;??????????????????????
end



%?Calculate?the?number?of?unique?points?
numUniquePts?=?ceil（（N+1）/2）;

%?This?is?an?evenly?spaced?frequency?vector?with?
%?NumUniquePts?points.?
f?=?（0:numUniquePts-1）*fs/N;?

mag?=?zeros（numUniquePtsnumVectors）;

for?i=1:numVectors
????
????%?create?zero?padded?array?for?this?signal
????sig_vec（i1:N）?=?zeros;
????sig_vec（i1:length（signals（:i）））?=?signals（:i）;
????
????%?perform?windowing?on?the?zero?padded?signal
????sig_window?=?sig_vec（i1:N）?.*?w;
????
????
????%?Take?fft?padding?with?zeros?so?that?length

?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----

?????文件???????2437??2007-11-02?15:39??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\accumulator_96bit_tb.vhd

?????文件???????5740??2007-03-05?14:58??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\addaccum96.v

?????文件??????10689??2007-03-05?14:58??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\addaccum96.vhd

?????文件??????30481??2007-01-29?12:17??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\mult59x59.v

?????文件??????34093??2007-03-01?09:28??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\mult59x59.vhd

?????文件???????4929??2007-02-27?10:15??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\mult59x59_tb.v

?????文件??????17409??2005-08-19?08:13??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\PolyDecFilter.zip

?????文件??????14553??2005-08-19?08:13??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\PolyIntrpFilter.zip

?????文件???????4981??2007-11-05?12:10??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\README.txt

?????文件????????715??2006-04-11?08:00??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\abs24_test.v

?????文件????????801??2006-04-14?07:30??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\accum48_test.v

?????文件????????912??2006-04-18?20:58??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\add4_46_test.v

?????文件????????818??2006-04-12?09:15??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\addsub48_test.v

?????文件????????627??2006-05-04?11:49??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\addsub96_test.v

?????文件????????822??2006-05-04?12:59??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\autoreset_pd_test.v

?????文件????????863??2007-01-24?14:22??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\barrelshifter_18bit_test.v

?????文件????????802??2006-04-12?08:41??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\cntr_load_test.v

?????文件???????1108??2006-05-04?14:55??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\comp_mult_pipe_test.v

?????文件????????680??2006-05-11?13:48??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\conv_round_cc_test.v

?????文件???????1330??2006-05-18?13:55??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\conv_round_lsb_test.v

?????文件????????777??2006-05-05?10:25??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\div_mult_cascade_test.v

?????文件???????1456??2006-04-12?09:42??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\dsp_adder12_test.v

?????文件????????940??2006-04-14?09:53??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\dsp_adder24_test.v

?????文件????????702??2006-04-14?10:06??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\dsp_adder48_test.v

?????文件????????553??2006-05-10?12:42??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\fast_sqrt_mult_cascade_test.v

?????文件????????668??2006-05-05?10:34??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\logic48_test.v

?????文件????????819??2006-05-09?13:23??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\macc18x18_test.v

?????文件????????716??2006-04-18?14:12??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\mult25x18_parallel_pipe_test.v

?????文件????????736??2006-05-09?12:48??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\mult25x35_parallel_pipe_test.v

?????文件????????794??2006-05-30?13:54??FPGA數(shù)字信號處理實現(xiàn)原理及方法\dsp48e_application\test\mult35x35_parallel_pipe_test.v

............此處省略251個文件信息