/**********************************************************************/
/*???____??____???????????????????????????????????????????????????????*/
/*??/???/\/???/???????????????????????????????????????????????????????*/
/*?/___/??\??/????????????????????????????????????????????????????????*/
/*?\???\???\/???????????????????????????????????????????????????????*/
/*??\???\????????Copyright?（c）?2003-2009?Xilinx?Inc.????????????????*/
/*??/???/??????????All?Right?Reserved.?????????????????????????????????*/
/*?/---/???/\?????????????????????????????????????????????????????????*/
/*?\???\??/??\??????????????????????????????????????????????????????*/
/*??\___\/\___\????????????????????????????????????????????????????*/
/***********************************************************************/

/*?This?file?is?designed?for?use?with?ISim?build?0x7708f090?*/

#define?XSI_HIDE_SYMBOL_SPEC?true
#include?“xsi.h“
#include?
#ifdef?__GNUC__
#include?
#else
#include?
#define?alloca?_alloca
#endif
static?int?ng0[]?=?{0?0};

static?void?NetReassign_45_7（char?*）;


static?int?PathDecl_56_5（char?*t1）
{
????int?t0;
????char?*t2;
????char?*t3;
????unsigned?int?t4;
????unsigned?int?t5;
????unsigned?int?t6;
????unsigned?int?t7;
????unsigned?int?t8;

LAB0:????t2?=?（t1?+?1664U）;
????t3?=?*（（char?**）t2）;
????t2?=?（t3?+?4）;
????t4?=?*（（unsigned?int?*）t2）;
????t5?=?（~（t4））;
????t6?=?*（（unsigned?int?*）t3）;
????t7?=?（t6?&?t5）;
????t8?=?（t7?!=?0）;
????t0?=?t8;

LAB1:????return?t0;
}

static?int?PathDecl_58_6（char?*t1）
{
????char?t2[8];
????int?t0;
????char?*t3;
????char?*t4;
????unsigned?int?t5;
????unsigned?int?t6;
????unsigned?int?t7;
????unsigned?int?t8;
????unsigned?int?t9;
????char?*t10;
????char?*t11;
????unsigned?int?t12;
????unsigned?int?t13;
????unsigned?int?t14;
????unsigned?int?t15;
????unsigned?int?t16;

LAB0:????t3?=?（t1?+?1664U）;
????t4?=?*（（char?**）t3）;
????memset（t2?0?8）;
????t3?=?（t4?+?4）;
????t5?=?*（（unsigned?int?*）t3）;
????t6?=?（~（t5））;
????t7?=?*（（unsigned?int?*）t4）;
????t8?=?（t7?&?t6）;
????t9?=?（t8?&?1U）;
????if?（t9?!=?0）
????????goto?LAB5;

LAB3:????if?（*（（unsigned?int?*）t3）?==?0）
????????goto?LAB2;

LAB4:????t10?=?（t2?+?4）;
????*（（unsigned?int?*）t2）?=?1;
????*（（unsigned?int?*）t10）?=?1;

LAB5:????t11?=?（t2?+?4）;
????t12?=?*（（unsigned?int?*）t11）;
????t13?=?（~（t12））;
????t14?=?*（（unsigned?int?*）t2）;
????t15?=?（t14?&?t13）;
????t16?=?（t15?!=?0）;
????t0?=?t16;

LAB1:????return?t0;
LAB2:????*（（unsigned?int?*）t2）?=?1;
????goto?LAB5;

}

static?void?NetDecl_37_0（char?*t0）
{
????char?*t1;
????char?*t2;
????char?*t3;
????char?*t4;
????char?*t5;
????char?*t6;
????char?*t7;
????char?*t8;
????char?*t9;
????unsigned?int?t10;
????unsigned?int?t11;
????char?*t12;
????unsigned?int?t13;
????unsigned?int?t14;
????char?*t15;
????unsigned?int?t16;
????unsigned?int?t17;
????char?*t18;

LAB0:????t1?=?（t0?+?3144U）;
????t2?=?

?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----

?????文件???????3534??2018-04-21?09:44??vga_sobel\fuse.log

?????文件???????1135??2018-04-21?09:44??vga_sobel\fuse.xmsgs

?????文件????????262??2018-04-21?09:44??vga_sobel\fuseRelaunch.cmd

?????文件???????6131??2013-10-14?02:34??vga_sobel\ipcore_dir\clk_control\clk_wiz_v3_6_readme.txt

?????文件???????6131??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\doc\clk_wiz_v3_6_readme.txt

?????文件???????6789??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\doc\clk_wiz_v3_6_vinfo.html

?????文件??????42657??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\doc\pg065_clk_wiz.pdf

?????文件???????2625??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\example_design\clk_control_exdes.ucf

?????文件???????4839??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\example_design\clk_control_exdes.v

?????文件???????3119??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\example_design\clk_control_exdes.xdc

?????文件???????3673??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\implement.bat

?????文件???????3552??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\implement.sh

?????文件???????2695??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\planAhead_ise.bat

?????文件???????2603??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\planAhead_ise.sh

?????文件???????3104??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\planAhead_ise.tcl

?????文件???????2690??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\planAhead_rdn.bat

?????文件???????2595??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\planAhead_rdn.sh

?????文件???????3230??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\planAhead_rdn.tcl

?????文件?????????86??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\xst.prj

?????文件????????177??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\implement\xst.scr

?????文件???????5280??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\clk_control_tb.v

?????文件????????147??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\functional\simcmds.tcl

?????文件???????2780??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\functional\simulate_isim.bat

?????文件???????2663??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\functional\simulate_isim.sh

?????文件???????2771??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\functional\simulate_mti.bat

?????文件???????2692??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\functional\simulate_mti.do

?????文件???????2641??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\functional\simulate_mti.sh

?????文件???????2770??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\functional\simulate_ncsim.sh

?????文件???????2912??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\functional\simulate_vcs.sh

?????文件????????102??2018-04-17?15:16??vga_sobel\ipcore_dir\clk_control\simulation\functional\ucli_commands.key

............此處省略374個文件信息