//-----------------------------------------------------------------------------
//???File:??????fw.c
//???Contents:???Firmware?frameworks?task?dispatcher?and?device?request?parser
//????????????source.
//
//?indent?3.??NO?TABS!
//
//?$Revision:?17?$
//?$Date:?11/15/01?5:45p?$
//
//???Copyright?（c）?1997?AnchorChips?Inc.?All?rights?reserved
//-----------------------------------------------------------------------------
#include?“fx2.h“
#include?“fx2regs.h“

//-----------------------------------------------------------------------------
//?Constants
//-----------------------------------------------------------------------------
#define?DELAY_COUNT???0x9248*8L??//?Delay?for?8?sec?at?24Mhz?4?sec?at?48
#define?_IFREQ??48000????????????//?IFCLK?constant?for?Synchronization?Delay
#define?_CFREQ??48000????????????//?CLKOUT?constant?for?Synchronization?Delay

//-----------------------------------------------------------------------------
//?Random?Macros
//-----------------------------------------------------------------------------
#define???min（ab）?（（（a）<（b））?（a）:（b））
#define???max（ab）?（（（a）>（b））?（a）:（b））

??//?Registers?which?require?a?synchronization?delay?see?section?15.14
??//?FIFORESET????????FIFOPINPOLAR
??//?INPKTEND?????????OUTPKTEND
??//?EPxBCH:L?????????REVCTL
??//?GPIFTCB3?????????GPIFTCB2
??//?GPIFTCB1?????????GPIFTCB0
??//?EPxFIFOPFH:L?????EPxAUTOINLENH:L
??//?EPxFIFOCFG???????EPxGPIFFLGSEL
??//?PINFLAGSxx???????EPxFIFOIRQ
??//?EPxFIFOIE????????GPIFIRQ
??//?GPIFIE???????????GPIFADRH:L
??//?UDMACRCH:L???????EPxGPIFTRIG
??//?GPIFTRIG
??
??//?Note:?The?pre-REVE?EPxGPIFTCH/L?register?are?affected?as?well...
??//??????...these?have?been?replaced?by?GPIFTC[B3:B0]?registers
??
#include?“fx2sdly.h“?????????????//?Define?_IFREQ?and?_CFREQ?above?this?#include

//-----------------------------------------------------------------------------
//?Global?Variables
//-----------------------------------------------------------------------------
volatile?BOOL???GotSUD;
BOOL??????Rwuen;
BOOL??????Selfpwr;
volatile?BOOL???Sleep;??????????????????//?Sleep?mode?enable?flag

WORD???pDeviceDscr;???//?Pointer?to?Device?Descriptor;?Descriptors?may?be?moved
WORD???pDeviceQualDscr;
WORD???pHighSpeedConfigDscr;
WORD???pFullSpeedConfigDscr;???
WORD???pConfigDscr;
WORD???pOtherConfigDscr;???
WORD???pStringDscr;???

//-----------------------------------------------------------------------------
//?Prototypes
//-----------------------------------------------------------------------------
void?SetupCommand（void）;
void?TD_Init（void）;
void?TD_Poll（void）;
BOOL?TD_Suspend（void）;
BOOL?TD_Resume（void）;

BOOL?DR_GetDescriptor（void）;
BOOL?DR_SetConfiguration（void）;
BOOL?DR_GetConfiguration（void）;
BOOL?DR_SetInterface（void）;
BOOL?DR_GetInterface（void）;
BOOL?DR_GetStatus（void）;
BOOL?DR_ClearFeature（void）;
BOOL?DR_SetFeature（void）;
BOOL?DR_VendorCmnd（void）;

//?this?table?is?used?by?the?epcs?macro?

?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----

?????文件???????8257??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\atom_netlists\MYFX2.qsf

?????文件????????310??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\Chain1.cdf

?????文件??????????3??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\cmp_state.ini

?????文件???????2821??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_02k1.tdf

?????文件???????2851??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_1l81.tdf

?????文件??????43820??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_1sc1.tdf

?????文件???????2765??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_3731.tdf

?????文件??????22302??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_3fb1.tdf

?????文件??????23595??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_akj1.tdf

?????文件??????23608??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_drg1.tdf

?????文件???????2749??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_f3e1.tdf

?????文件???????2767??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_j931.tdf

?????文件???????2771??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_l931.tdf

?????文件???????2616??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_ni01.tdf

?????文件??????22279??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_t3s1.tdf

?????文件??????23706??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_ttg1.tdf

?????文件??????23712??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\altsyncram_vtg1.tdf

?????文件???????2095??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_0e8.tdf

?????文件???????2090??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_1e8.tdf

?????文件???????2090??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_2e8.tdf

?????文件???????2090??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_3e8.tdf

?????文件???????2090??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_4e8.tdf

?????文件???????2090??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_5e8.tdf

?????文件???????2094??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_6e8.tdf

?????文件???????2094??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_7e8.tdf

?????文件???????2090??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_8e8.tdf

?????文件???????2090??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_9e8.tdf

?????文件???????2090??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_ae8.tdf

?????文件???????2090??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_be8.tdf

?????文件???????2094??2010-09-10?14:15??SourceCode27_SLAVE_FIFO16模式讀SDRAM_FIFO\FPGA_SourceCode\db\alt_synch_pipe_ce8.tdf

............此處省略275個文件信息