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    發布日期: 2023-06-20
  • 語言: 其他
  • 標簽: STM32??FPGA??SPI??

資源簡介

本人首先用兩片STM32F1以軟件的方式進行SPI通信,一主一從以便了解SPI協議,通信測試成功(實際中一般用硬件spi)。然后用STM32F1主機與FPGA進行通信,根據從機STM32F1從機的接收代碼改為Verilog,并且將SPI接收到的數據顯示在0.96寸OLED(FPGA驅動OLED也是SPI方式,只是FPGA作為主機了)上。

資源截圖

代碼片段和文件信息

#include?“can.h“
#include?“usart.h“


//CAN初始化
//tsjw:重新同步跳躍時間單元.范圍:CAN_SJW_1tq~?CAN_SJW_4tq
//tbs2:時間段2的時間單元.???范圍:CAN_BS2_1tq~CAN_BS2_8tq;
//tbs1:時間段1的時間單元.???范圍:CAN_BS1_1tq?~CAN_BS1_16tq
//brp?:波特率分頻器.范圍:1~1024;??tq=(brp)*tpclk1
//波特率=Fpclk1/((tbs1+tbs2+1)*brp);
//mode:CAN_Mode_Normal普通模式;CAN_Mode_LoopBack回環模式;
//Fpclk1的時鐘在初始化的時候設置為36M如果設置CAN_Mode_Init(CAN_SJW_1tqCAN_BS2_8tqCAN_BS1_9tq4CAN_Mode_LoopBack);
//則波特率為:36M/((8+9+1)*4)=500Kbps
//返回值:0初始化OK;
//????其他初始化失敗;
u8?CAN_Mode_Init(u8?tsjwu8?tbs2u8?tbs1u16?brpu8?mode) ?
{
GPIO_InitTypeDef??GPIO_InitStructure;
CAN_InitTypeDef ?CAN_InitStructure;
CAN_FilterInitTypeDef?CAN_FilterInitStructure;

#if?CAN_RX0_INT_ENABLE?
NVIC_InitTypeDef?? NVIC_InitStructure;
#endif

RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1?ENABLE);?//打開CAN1時鐘
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA?ENABLE);???//PA端口時鐘打開

GPIO_InitStructure.GPIO_Pin?=?GPIO_Pin_11; //PA11 ???
GPIO_InitStructure.GPIO_Mode?=?GPIO_Mode_IPU;? ?//上拉輸入模式
GPIO_Init(GPIOA?&GPIO_InitStructure);

GPIO_InitStructure.GPIO_Pin?=?GPIO_Pin_12; //PA12 ???
GPIO_InitStructure.GPIO_Mode?=?GPIO_Mode_AF_PP;? ?//復用推挽輸出
GPIO_InitStructure.GPIO_Speed?=?GPIO_Speed_50MHz; ?//IO口速度為50MHz
GPIO_Init(GPIOA?&GPIO_InitStructure);

CAN_InitStructure.CAN_Prescaler=brp;??//分頻系數
CAN_InitStructure.CAN_Mode=mode;??//CAN工作模式??環回模式
CAN_InitStructure.CAN_SJW=tsjw;?//重新同步跳躍寬度?1?個時間單位
CAN_InitStructure.CAN_BS1=tbs1;?//時間段?1?為?8?個時間單位
CAN_InitStructure.CAN_BS2=tbs2;?//時間段?2?為?7?個時間單位
CAN_InitStructure.CAN_TTCM=DISABLE;?//非時間觸發通信模式
CAN_InitStructure.CAN_ABOM=DISABLE;?//失能自動離線管理
CAN_InitStructure.CAN_AWUM=DISABLE;?//失能自動喚醒模式
CAN_InitStructure.CAN_NART=ENABLE;?//使能非自動重傳輸模式
CAN_InitStructure.CAN_RFLM=DISABLE;?//失能接收?FIFO?鎖定模式
CAN_InitStructure.CAN_TXFP=DISABLE;?//失能發送?FIFO?優先級
CAN_Init(CAN1&CAN_InitStructure);

CAN_FilterInitStructure.CAN_FilterNumber=0; //過濾器0
CAN_FilterInitStructure.CAN_FilterMode=CAN_FilterMode_IdMask;? //屏蔽位模式
CAN_FilterInitStructure.CAN_FilterScale=CAN_FilterScale_32bit;? //32位寬?
CAN_FilterInitStructure.CAN_FilterIdHigh=0x0000; //32位ID
CAN_FilterInitStructure.CAN_FilterIdLow=0x0000;
CAN_FilterInitStructure.CAN_FilterMaskIdHigh=0x0000;//32位MASK
CAN_FilterInitStructure.CAN_FilterMaskIdLow=0x0000;
CAN_FilterInitStructure.CAN_FilterFIFOAssignment=CAN_Filter_FIFO0;//過濾器0關聯到FIFO0
CAN_FilterInitStructure.CAN_FilterActivation=ENABLE;//激活過濾器0
CAN_FilterInit(&CAN_FilterInitStructure); //濾波器初始化

#if?CAN_RX0_INT_ENABLE?
CAN_ITConfig(CAN1CAN_IT_FMP0ENABLE); //FIFO0消息掛號中斷允許. ????

NVIC_InitStructure.NVIC_IRQChannel?=?USB_LP_CAN1_RX0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority?=?1;?????//?主優先級為1
NVIC_InitStructure.NVIC_IRQChannelSubPriority?=?0;????????????//?次優先級為0
NVIC_InitStructure.NVIC_IRQChannelCmd?=?ENABLE;
NVIC_Init(&NVIC_InitStructure);
#endif
return?0;
}

#if?CAN_RX0_INT_ENABLE //使能RX0中斷
//中斷服務函數 ????
void?USB_LP_

?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----
?????目錄???????????0??2018-11-30?21:56??OLED_SPI_STM32_FPGA\
?????目錄???????????0??2018-11-10?18:23??OLED_SPI_STM32_FPGA\OLED_CSDN\
?????目錄???????????0??2018-11-30?21:52??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\
?????文件?????????356??2018-11-13?00:14??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\MY_PLL.ppf
?????文件?????????360??2018-11-13?00:14??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\MY_PLL.qip
?????文件???????14616??2018-11-13?00:14??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\MY_PLL.v
?????文件???????10826??2018-11-13?00:14??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\MY_PLL_bb.v
?????文件?????????932??2018-11-12?20:52??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLL.cmp
?????文件?????????859??2018-11-12?20:52??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLL.inc
?????文件?????????413??2018-11-12?20:52??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLL.ppf
?????文件?????????518??2018-11-12?20:52??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLL.qip
?????文件???????15455??2018-11-12?20:52??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLL.vhd
?????文件?????????253??2018-11-30?21:46??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLLJ_PLLSPE_INFO.txt
?????文件?????????360??2018-08-12?18:53??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLL_1M_10K.ppf
?????文件?????????372??2018-08-12?18:53??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLL_1M_10K.qip
?????文件???????10866??2018-08-12?18:53??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLL_1M_10K_bb.v
?????文件?????????101??2018-11-12?20:52??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\PLL_inst.vhd
?????文件?????????968??2018-08-08?14:12??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\ROM.cmp
?????文件?????????359??2018-08-08?14:12??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\ROM.qip
?????文件????????6287??2018-08-08?14:12??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\ROM.vhd
?????文件??????????99??2018-08-08?14:12??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\ROM_inst.vhd
?????文件?????????371??2017-10-19?10:08??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\Tcl_script1.tcl
?????文件?????????371??2017-10-17?13:45??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\Tcl_script1.tcl.bak
?????目錄???????????0??2018-11-30?18:54??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\__Previews\
?????文件???????32943??2018-11-30?18:54??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\__Previews\fq_get.vPreview
?????目錄???????????0??2018-11-30?21:52??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\db\
?????文件?????????201??2017-10-22?10:31??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\db\.cmp.kpt
?????文件????????3946??2018-08-12?19:38??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\db\MY_PLL_altpll.v
?????文件????????3942??2018-11-13?00:10??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\db\MY_PLL_altpll1.v
?????文件????????4102??2018-11-12?20:53??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\db\PLL_altpll.v
?????文件????????1733??2018-08-06?10:36??OLED_SPI_STM32_FPGA\OLED_CSDN\OLED\db\add_sub_7pc.tdf
............此處省略943個文件信息

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