/**********************************************************************/
/*???____??____???????????????????????????????????????????????????????*/
/*??/???/\/???/???????????????????????????????????????????????????????*/
/*?/___/??\??/????????????????????????????????????????????????????????*/
/*?\???\???\/???????????????????????????????????????????????????????*/
/*??\???\????????Copyright?（c）?2003-2009?Xilinx?Inc.????????????????*/
/*??/???/??????????All?Right?Reserved.?????????????????????????????????*/
/*?/---/???/\?????????????????????????????????????????????????????????*/
/*?\???\??/??\??????????????????????????????????????????????????????*/
/*??\___\/\___\????????????????????????????????????????????????????*/
/***********************************************************************/

/*?This?file?is?designed?for?use?with?ISim?build?0x6dd86d03?*/

#define?XSI_HIDE_SYMBOL_SPEC?true
#include?“xsi.h“
#include?
#ifdef?__GNUC__
#include?
#else
#include?
#define?alloca?_alloca
#endif
static?unsigned?int?ng0[]?=?{1U?0U};



static?void?Cont_35_0（char?*t0）
{
????char?t3[8];
????char?*t1;
????char?*t2;
????char?*t4;
????char?*t5;
????char?*t6;
????char?*t7;
????char?*t8;
????char?*t9;
????char?*t10;
????char?*t11;
????char?*t12;
????char?*t13;
????unsigned?int?t14;
????unsigned?int?t15;
????char?*t16;
????unsigned?int?t17;
????unsigned?int?t18;
????char?*t19;
????unsigned?int?t20;
????unsigned?int?t21;
????char?*t22;

LAB0:????t1?=?（t0?+?2352U）;
????t2?=?*（（char?**）t1）;
????if?（t2?==?0）
????????goto?LAB2;

LAB3:????goto?*t2;

LAB2:????t2?=?（t0?+?772U）;
????t4?=?*（（char?**）t2）;
????t2?=?（t0?+?864U）;
????t5?=?*（（char?**）t2）;
????t2?=?（t0?+?956U）;
????t6?=?*（（char?**）t2）;
????t2?=?（t0?+?1048U）;
????t7?=?*（（char?**）t2）;
????t2?=?（t0?+?1140U）;
????t8?=?*（（char?**）t2）;
????t2?=?（t0?+?1232U）;
????t9?=?*（（char?**）t2）;
????xsi_vlogtype_concat（t3?6?6?6U?t9?1?t8?1?t7?1?t6?1?t5?1?t4?1）;
????t2?=?（t0?+?3040）;
????t10?=?（t2?+?32U）;
????t11?=?*（（char?**）t10）;
????t12?=?（t11?+?40U）;
????t13?=?*（（char?**）t12）;
????memset（t13?0?8）;
????t14?=?63U;
????t15?=?t14;
????t16?=?（t3?+?4）;
????t17?=?*（（unsigned?int?*）t3）;
????t14?=?（t14?&?t17）;
????t18?=?*（（unsigned?int?*）t16）;
????t15?=?（t15?&?t18）;
????t19?=?（t13?+?4）;
????t20?=?*（（unsigned?int?*）t13）;
????*（（unsigned?int?*）t13）?=?（t20?|?t14）;
????t21?=?*（（unsigned?int?*）t19）;
????*（（unsigned?int?*）t19）?=?（t21?|?t15）;
????xsi_driver_vfirst_trans（t2?0?5）;
????t22?=?（t0?+?2980）;
????*（（int?*）t22）?=?1;

LAB1:????return;
}

static?void?Cont_36_1（char?*t0）
{
????char?t5[8];
????char?*t1;
????char?*t2;
????char?*t3;
????char?*t4;
????char?*t6;
????char?*t7;
????char?*t8;
????char?*t9;
????char?*t10;
????char?*t11;
????char?*t12;
????char?*t13;
????char?*t14;
????unsigned?int?t15;
????unsigned?int?t16;
????char?*t17;
????unsigned?int?t18;
????unsigned?int?t19;
????char?

?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----
?????目錄???????????0??2011-08-09?16:54??labsolution\verilog\
?????目錄???????????0??2011-08-09?16:54??labsolution\verilog\lab1\
?????目錄???????????0??2011-08-09?16:54??labsolution\verilog\lab1\Flow_lab\
?????文件???????14442??2011-08-09?13:55??labsolution\verilog\lab1\Flow_lab\Flow_lab.gise
?????文件???????41576??2011-08-09?13:54??labsolution\verilog\lab1\Flow_lab\Flow_lab.xise
?????文件????????2005??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\fuse.log
?????文件?????????367??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\fuse.xmsgs
?????文件?????????279??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\fuseRelaunch.cmd
?????文件????????9747??2011-08-09?13:00??labsolution\verilog\lab1\Flow_lab\INT_TEST.V
?????目錄???????????0??2011-08-09?16:54??labsolution\verilog\lab1\Flow_lab\iseconfig\
?????文件????????7758??2011-08-09?13:55??labsolution\verilog\lab1\Flow_lab\iseconfig\Flow_lab.projectmgr
?????文件???????20911??2011-08-09?13:53??labsolution\verilog\lab1\Flow_lab\iseconfig\kcpsm3_int_test.xreport
?????目錄???????????0??2011-08-09?16:54??labsolution\verilog\lab1\Flow_lab\isim\
?????文件????????1681??2011-08-09?13:51??labsolution\verilog\lab1\Flow_lab\isim\isim_usage_statistics.html
?????文件???????????6??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\pn_info
?????目錄???????????0??2011-08-09?16:54??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\
?????文件???????????0??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\isimcrash.log
?????文件??????279729??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\ISimEngine-DesignHierarchy.dbg
?????文件?????????578??2011-08-09?13:51??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\isimkernel.log
?????文件?????????100??2011-08-09?13:51??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\netId.dat
?????文件??????179280??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\testbench_isim_beh.exe
?????目錄???????????0??2011-08-09?16:54??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\tmp_save\
?????文件??????170799??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\tmp_save\_1
?????目錄???????????0??2011-08-09?16:54??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\unisims_ver\
?????文件????????7166??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\unisims_ver\m_00000000000053605399_2464469589.c
?????文件????????3744??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\unisims_ver\m_00000000000053605399_2464469589.didat
?????文件????????2306??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\unisims_ver\m_00000000000053605399_2464469589.nt.obj
?????文件????????8308??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\unisims_ver\m_00000000000129024098_1730278898.c
?????文件????????3632??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\unisims_ver\m_00000000000129024098_1730278898.didat
?????文件????????2635??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\unisims_ver\m_00000000000129024098_1730278898.nt.obj
?????文件????????1986??2011-08-09?13:49??labsolution\verilog\lab1\Flow_lab\isim\testbench_isim_beh.exe.sim\unisims_ver\m_00000000000236260522_2449448540.c
............此處省略3373個文件信息