資源簡介
對于很多嵌入式ARM開發者和愛好者,特別是初學者,如何從底層開始了解和學習6410,絕非是一件容易的事!為此,友善之臂的工程師,花了很多時間和心血,基于Tiny6410/Mini6410開發板編寫了這份項詳盡的裸機教程,以供參考學習之用。【轉載】
代碼片段和文件信息
//?功能:c語言初始化時鐘
#define?APLL_LOCK?(*((volatile?unsigned?long?*)0x7E00F000))
#define?MPLL_LOCK?(*((volatile?unsigned?long?*)0x7E00F004))
#define?EPLL_LOCK?(*((volatile?unsigned?long?*)0x7E00F008))
#define?OTHERS????(*((volatile?unsigned?long?*)0x7e00f900))
#define?CLK_DIV0??(*((volatile?unsigned?long?*)0x7E00F020))
#define?ARM_RATIO????0??? //?ARMCLK? =?DOUTAPLL?/?(ARM_RATIO?+?1)?? =?532/(0+1)?=?532?MHz
#define?MPLL_RATIO???0??? //?DOUTMPLL?=?MOUTMPLL?/?(MPLL_RATIO?+?1)???=?532/(0+1)?=?532??MHz
#define?HCLKX2_RATIO?1??? //?HCLKX2? =?HCLKX2IN?/?(HCLKX2_RATIO?+?1)?=?532/(1+1)?=?266??MHz
#define?HCLK_RATIO???1??? //?HCLK? =?HCLKX2???/?(HCLK_RATIO?+?1)???=?266/(1+1)?=?133??MHz
#define?PCLK_RATIO???3??? //?PCLK??? =?HCLKX2???/?(PCLK_RATIO?+?1)???=?266/(3+1)?=?66.5?MHz
#define?APLL_CON??(*((volatile?unsigned?long?*)0x7E00F00C))
#define?APLL_CON_VAL??((1<<31)?|?(250?<16)?|?(3?<8)?|?(1))
#define?MPLL_CON??(*((volatile?unsigned?long?*)0x7E00F010))
#define?MPLL_CON_VAL??((1<<31)?|?(250?<16)?|?(3?<8)?|?(1))
#define?CLK_SRC??(*((volatile?unsigned?long?*)0x7E00F01C))
void?clock_init(void)
{
/*?1.?設置各PLL的LOCK_TIME使用默認值?*/
APLL_LOCK?=?0xffff; //?APLL_LOCK,供cpu使用?
MPLL_LOCK?=?0xffff; //?MPLL_LOCK,供AHB(存儲/中斷/lcd等控制器)/APB(看門狗,定時器,SD等)總線上的設備使用
EPLL_LOCK?=?0xffff; //?EPLL_LOCK,供UARTIISIIC使用?
/*?2.?設置為異步模式(Asynchronous?mode)?*/
OTHERS?&=?~0xc0; //《linux?installation?for?u-boot》3.7中:用MPLL作為HCLK和PCLK的Source是異步(ASYNC)模式用APLL是同步(SYNC)模式
while?((OTHERS?&?0xf00)?!=?0);
/*?3.?設置分頻系數?*/
CLK_DIV0?=?(ARM_RATIO)?|?(MPLL_RATIO?<4)?|?(HCLK_RATIO?<8)?|?(HCLKX2_RATIO?<9)?|?(PCLK_RATIO?<12);
/*?4.?設置PLL放大時鐘?*/
APLL_CON?=?APLL_CON_VAL;??
MPLL_CON?=?MPLL_CON_VAL;??
/*?5.?選擇PLL的輸出作為時鐘源?*/
CLK_SRC?=?0x03;
}
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